FROM DEVICE PHYSICS TO NAMED IMPLEMENTATIONS從物理原理到具名實作
NVM Knowledge HubNVM 知識中心
Nonvolatile memory foundations, IP and processes, application architectures, and public literature. Browse by topic to connect principles, named implementations and design conditions.非揮發性記憶體的技術基礎、IP 與製程、應用架構及公開文獻。依主題查閱原理、具名實作與設計條件。
Four Ways to Read a Stored State儲存狀態的四個觀察角度
Conceptual symbols. OTP is not one physics: floating-gate OTP is charge; AntiFuse OTP is a dielectric path. See each study for materials and operating conditions.物理概念示意。OTP 不是單一物理：浮動閘 OTP 是電荷，AntiFuse OTP 是介電路徑。各實作的材料與操作條件請見專題。
- Named Technology Routes具名技術路線
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- Industry and Research Families產研技術家族
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- In-Depth Studies產研深度專題
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- One Reference, Two Languages同一份資料，兩種閱讀語言
- English / Traditional Chinese英文／繁體中文
Technology Foundations技術基礎
Understand stored states, read/write physics and reliability before comparing technology tradeoffs.理解儲存狀態、讀寫物理與可靠度，再比較不同技術的取捨。
Bitcell Physics and Reliability位元單元物理與可靠度
Understand retention, endurance, and observability through charge, resistance, and read paths.從電荷、電阻及讀取路徑，理解保持、耐久與可觀察性。
Storage Mechanisms and Technology Families儲存機制與技術家族
Browse sixteen technology topics by charge, magnetization, resistance and polarization, including floating-gate OTP and AntiFuse OTP.依電荷、磁性、電阻及極化查閱十六類技術。電荷含浮動閘 OTP，電阻路徑含 AntiFuse OTP。
Technology Selection Matrix架構選型比較
Evaluate memory families and integration boundaries against data lifecycle and system requirements. Named IPs (TwinBit, I-fuse, Floadia ZT/ZA/G1/G2, Actt LogicFlash, CFX, SST) sit under existing family leaves. CMT is 2016 acquisition lineage, not a current SKU. The atlas comparison section maps mechanisms only; it does not rewrite the 2016/2021 course table.以資料生命週期與系統需求，評估記憶體家族與整合邊界；具名 IP（TwinBit、I-fuse、Floadia ZT／ZA／G1／G2、Actt LogicFlash、CFX、SST）掛在既有族群葉下。CMT 是 2016 年收購沿革，不是現行 SKU。全景比較節另有機制對照，不改寫 2016／2021 歷史表。
Four Architecture-Class Read Modes四種架構級讀取模式
Single-ended, redundant, differential, and differential+redundant trade-offs (architecture-class sketch, not a named-IP datasheet).單端、冗餘、差動與差動＋冗餘的架構級取捨（示意，非具名 IP datasheet）。
IP and ProcessesIP 與製程
Connect named IP cell principles with technology lineage and foundry integration.從具名 IP 的單元原理，連到技術沿革與晶圓代工整合。
IP Cells and Operating PrinciplesIP 單元與操作原理
Explore named OTP, MTP, eFlash, MRAM and ReRAM IP through cell structures, carrier paths and operating states.依 OTP、MTP、eFlash、MRAM、ReRAM 查閱具名 IP 的結構、載子路徑與操作狀態。
IP Technology LineageIP 技術沿革與承接關係
Trace technologies, products and business transfers across Kilopass, Sidense, Impinj/Virage and Synopsys.追蹤 Kilopass、Sidense、Impinj／Virage 與 Synopsys 的技術、產品及業務承接。
Foundry Processes and Roadmaps晶圓代工製程與路線圖
Track GF/TSMC/UMC memory integration, public milestones and implementation conditions.逐年查看 GF／TSMC／UMC 的記憶體整合、公開進度與產品條件。
Global Industry and Research Map全球產業與研究地圖
Find Everspin, Samsung, Renesas, Weebit and other major suppliers and research organizations by technology family.按技術家族查找 Everspin、Samsung、Renesas、Weebit 等主要廠商與研究機構。
In-Depth Industry and Research Studies主要產研路線深度比較
Explore Everspin, UMC, Panasonic, IBM and ITRI mechanisms, integration conditions and adoption implications.深入 Everspin、UMC、Panasonic、IBM 與工研院的機制、整合條件與導入意涵。
Applications and Systems應用與系統
Use data requirements and system responsibilities to explore security architectures and applications.依要保存的資料與系統責任，查閱安全架構及各類應用。
Secure Storage Architecture安全儲存架構
SRAM PUF, key reconstruction, encryption, and controller responsibilities.SRAM PUF、金鑰重建、加密與控制器的責任邊界。
Security Assurance and Roots of Trust安全保證與信任根
Connect threat models, attack surfaces, tests, and certification evidence to system claims.威脅模型、攻擊面、測試與認證證據如何接到系統主張。
AI Systems and Advanced NodesAI 系統與先進節點
Persistent-state requirements in accelerators, chiplets, and memory systems.加速器、chiplet 與記憶體系統中的持久狀態需求。
SRAM Repair Capacity EstimatorSRAM 修復容量估算器
Enter SRAM capacity, repair-data fraction and compression to compare OTP and eFuse payload and allocation.輸入 SRAM 容量、修復資料比例與壓縮率，即時比較 OTP／eFuse 的有效資料與配置容量。
Low-Power IoT and MCU eNVM低功耗 IoT 與 MCU
System tradeoffs in code, calibration, updates, and standby energy.程式碼、校準、更新與待機能量的整體取捨。
Automotive NVM車用 NVM
How temperature, mission profiles, and reliability evidence constrain technology choice.溫度、使用任務與可靠度證據如何限制技術選擇。
Specialty Processes and BCD特種製程與 BCD
Trim and configuration state in power management, high-voltage drivers, and sensors.電源管理、高壓驅動與感測器的校準及配置資料。
Literature and Tools文獻與工具
Check public sources, use the decision studio, and access briefings and topic materials.查核公開來源，使用決策工作台，並取得簡報與專題材料。
Evidence Ledger證據總帳
Inspect source records, supported claims, and remaining verification boundaries.逐筆檢視來源、可支持的主張與仍需驗證的範圍。
Whitepaper Decision Studio白皮書決策工作台
Organize architecture material around inspectable state requirements and selection conditions.以可檢查的狀態需求與選型條件組織架構材料。
Technical Briefings and Talk Tracks技術簡報與講稿
Existing presentation material, talk tracks, and their source entry points.既有簡報、講稿及其來源入口。
OIP Secure Storage BriefOIP 安全儲存專頁
Event narrative, architecture, and evidence boundaries for SRAM PUF and secure storage.SRAM PUF 與安全儲存的展會論述、架構和證據邊界。
RESEARCH IN FOCUS產研專題導讀
Engineering Tradeoffs, Named Implementations從具名實作看工程取捨
Choose a research question, then examine the mechanism, integration conditions and original evidence.先選一個研究問題，再深入機制、整合條件與原始證據。
01 · Everspin
Three Product Lines: Toggle, DDR STT and xSPIToggle、DDR STT 與 xSPI 的三條產品線
Everspin is a core commercial MRAM reference. Its three product lines differ in write physics, interfaces, retention and qualification; compare exact ordering codes and document versions.Everspin 是 MRAM 商用比較不可缺少的核心案例。三條產品線的寫入物理、介面、保持與認證條件各不相同，必須以完整料號與文件版本比較。
UMCUMC 聯電
Embedded RRAM and a Distinct MRAM Product RouteRRAM 嵌入式平台與 MRAM 商品路徑並進
PanasonicPanasonic
Tantalum-Oxide Filaments and Product EvidenceTa 氧化物的導電絲控制與商品證據
IBM ResearchIBM Research
Read MRAM Scaling, Current and Retention Together把 MRAM 微縮、電流與保持放在一起看
ITRI工研院 ITRI
From SOT Write Channels to Arrays and Computing從 SOT 寫入通道走向陣列與運算
HOW TO USE THIS REFERENCE如何使用這個知識中心
Keep the Evidence with the Engineering Decision由原理到選擇，每一步都保留證據
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Separate Physics and Architecture辨別物理與架構
Start with the stored variable and operation, then account for array and system costs.先看儲存變數與操作，再確認陣列與系統的代價。
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Check a Named Implementation核對具名實作
Bind speed, endurance, retention, and production status to the same implementation and conditions.速度、耐久、保持與量產，必須綁定相同產品及條件。
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Reuse the Content with Its Sources保留來源再重用
Download the English or Chinese study data as a shared source for presentations and teaching.中英文資料可下載，作為後續簡報或教材的共同來源。